Soc/Asic Design Verification Engineer

Soc/Asic Design Verification Engineer
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Detalles de la oferta

zeroRISC is seeking highly-motivated Design Verification Engineers to develop and verify highly secure, open-source silicon. Built with OpenTitan, the first-ever commercial open-source secure silicon design, our products emphasize transparency and security to provide foundational trustworthiness to our customers.
You will be a significant contributor to OpenTitan at the top and block-level, learning from an experienced group of contributors in a highly collaborative community. While prior security experience is not required, you will be working closely on a high quality security design, verifying correctness and developing methodologies to scale customer integrations while preserving security guarantees.
ResponsibilitiesActively collaborate with silicon designers and software engineers, both in-house and in the open-source community.Review and provide feedback on architecture and design specifications. Participate in sign-off reviews and work to maintain design quality.Develop and maintain high-quality verification environments and documentation.Debug failures, in both open and closed source environments.Develop tests to verify functionality, performance, security, and power.Adhere to open-source best practices, including quality standards and documentation.RequirementsDeep knowledge of digital logic design, SOC architecture and microarchitecture.Proficient in simulation-based verification methodologies and languages such as UVM and SystemVerilog.Skilled in developing and maintaining testbenches, test cases, and verification environmentsStrong knowledge of Python as a scripting language is a plus.Knowledgeable in multi-power and multi-clock domain designs helpful.Background in ASIC security technologies is not necessary, but helpful.Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.Ability to work well in a team and be productive under aggressive schedules.Education and ExperiencePhD, Master's degree or Bachelor's degree in a technical subject area.

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Requisitos

Soc/Asic Design Verification Engineer
Empresa:

Jobleads-Us


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